New BeagleBoard hardware and system on module (SoM) products to be featured, as well as AI/ML solutions and industrial edge solutions suite
Will present keynote highlighting new advancements in Intelligent Edge compute and security paradigms based on RISC-V platforms

Designers who create systems for the complex Intelligent Edge need flexible, high-performance hardware and system-software combinations that easily handle demanding workloads while meeting increased security requirements at the edge. Achieving these objectives demands FPGAs with leading power-efficient technology, enhanced asymmetric compute, real-time AI inferencing, advanced security solutions and sophisticated system-level design tools. It all needs to scale, for any application, in any vertical market. Microchip Technology (Nasdaq: MCHP) will be at the upcoming RISC-V Summit, November 7-8, 2023, in Santa Clara, Calif., featuring solutions to these challenges.

“The Intelligent Edge is dependent on compute technologies that support high-speed inferencing, asymmetric processing for mixed-criticality systems and advanced design and data security that need secure hardware,” said Shakeel Peera, vice president of strategy and marketing for Microchip’s FPGA business unit. “We prioritized these and other innovations with our silicon, software and solutions to future-proof new product development.”

RISC-V-Based Solutions Solving Complex Demands at the Edge

The RISC-V ISA has enabled Microchip to develop innovative low-power heterogenous processing architectures that would otherwise not be possible using proprietary instruction set architectures. These include flexible caches, asymmetric processing on single application class clusters that can also support bare metal development and real-time applications, as well as efficient inferencing for AI/ML. These platforms are focused on meeting the intelligent edge’s significantly more complex and demanding design requirements especially in industrial, communications, medical, automotive, IoT, aviation and defense applications. System designers need FPGAs to provide the increased compute necessary for delivering intelligence in real-time, with ever-increasing flexibility, power, security and thermal efficiency that address the increased challenges that present themselves at the edge.

Extensive Tools, Mi-V Ecosystem and Solution Stacks for More Nimble Development

Together with its best-in-class silicon platforms, Microchip has updated it software design tools to include High Level Synthesis (HLS) for system designers who can implement C/C++ based design, Software Development Kits (SDKs) for implementing vector-based processing used for AI/ML inferencing and solution stacks for industrial automation and smart embedded vision. New partners, including BeagleBoard, will feature prominently in showcasing hardware and solutions as part of Microchip’s extensive Mi-V Ecosystem.

See Us At the RISC-V Summit

Microchip FPGA will be showcasing its latest silicon, solutions and Mi-V Ecosystem partners at the RISC-V Summit in Booth #D2 at the Santa Clara Convention Center. Microchip FPGA spokespeople will also be participating in keynote and technical sessions including:

Keynote: “100G Intelligent Edge innovations with RISC-V (the future is now),” presented by Bruce Weyer, Vice President, Microchip FPGA business unit, Nov. 7 at 9:55 a.m. in the Mission City Ballroom B2-B5.
Technical Session: “Accelerating Designs for SoC FPGA Using Simplified High-Level Synthesis Flows,” presented by Manuel Saldana, Senior Technical Engineer, High-Level Synthesis, Microchip FPGA business unit, Nov. 8, 2:35 p.m., Theater.
Member Day Session: “Future Direction of RISC-V Cryptography Extensions,” presented by Richard Newell, Associate Technical Fellow, Microchip, and Nicolas Brunie, Principle Engineer, SiFive, November 6, 1 p.m., Theater.
Member Day Session – RISC-V 101 Ecosystem, presented by Ted Speers, Microchip Technical Fellow, Monday, November 6, 9 a.m.